PCBRouteAgent: How Close Are LLM Agents to PCB Routing Engineers?

Problem

PCB routing is the task of connecting the pads of every net with copper traces and vias while following design rules (clearance, trace width, vias, etc.). In the earlier PCBWorld study, LLM agents using KiCad tools fell behind rule-based routers on complex real boards. There was no mechanism to coordinate board-level decisions, such as which connections to make first, how to divide routing space and when to switch layers, with actual geometric execution.

Method

The system is split into two parts: a Global Routing Planner and a Detailed Routing Executor. The Planner looks at both board images (layout, front and back copper layers, remaining connections) and structured text (pad coordinates, nets, design rules). It builds a topology that connects the disconnected clusters within each net with a minimum spanning tree (MST), and orders nets so that those with shorter total length are handled first. It then defines routing corridors made by expanding bounding boxes and candidate regions for placing vias. The Executor produces the actual traces with KiCad's push-and-shove router and attempts local repair only within the defined bounds. If that still fails, it returns structured feedback to the Planner. The Planner's multimodal LLM leaves already-successful traces as they are and issues a revision (guide patch) containing only the parts to change.

Results

• On the four PCBWorld-Bench test splits (247 boards), clean-pass rates were 100% on D2, 94.9% on D3-A, 100% on D3-B and 40% on D3-C.
• On the real-board splits D3-A/B/C, it outperformed the strongest rule-based baseline, Freerouting (75%/64%/30%). According to the abstract, it is 13.9, 36 and 10 percentage points higher, respectively, than the best baseline evaluated.
• It far outperformed the published PCBWorld GPT-5.4 agent (D3-A 42%, D3-B 0%).
• On D3-C, it achieved an average routability of 94.9% and reduced design rule violations per board from Freerouting's 32.0 to 6.3.

Limitations

On D3-C, the most complex real-board split, the clean-pass rate is only 40%. Initial planning relies on simple heuristics such as MST and bounding boxes. Actual routing quality depends heavily on KiCad's built-in router. The improvement over the baseline on D3-A is stated differently in the abstract (13.9 percentage points) and the main text (19.9 percentage points over Freerouting), so the baseline being compared should be checked. How well it handles signal-specific constraints such as differential pairs is hard to determine from the provided text.

Why it matters

PCB design is an electronics manufacturing process that still relies heavily on manual work by skilled engineers. This work uses a structure that repeats planning, execution, failure feedback and replanning, similar to how people work. It shows that this approach lets LLM agents surpass existing automatic routers on top of real EDA tools.

Key terms

PCB routing

The task of physically connecting pads that belong to the same net in a schematic with copper traces and vias while following design rules.

Net / Via

A net is a group of terminals that must be electrically connected. A via is a hole that connects different copper layers.

Clean-pass rate

The share of boards on which all connections are completed with zero design rule violations.

Global routing / detailed routing

Global routing sets the high-level plan, such as connection order, corridors and layer use. Detailed routing produces the actual trace geometry according to that plan. This division of labor is also used in IC design.

Original

• arXiv abstract
• PDF
• HTML full text
• Code
• Project
• Hugging Face

Authors: Yue Zhang, Jilei Sun, Liqiang Jing, Yijie Wei, Ruohan Yang · Posted 2026-11-05 · License arXiv 비독점 배포 라이선스 · Based on the full text

This review is an AI-written summary of the paper. Please treat the original paper as the reference.